报告题目：Efficient Reconfiguration Algorithms for Degradable VLSI Arrays with Faults

报告人：武继刚教授

报告时间：5月13日15：00

报告地点：校本部理工楼504会议室

报告摘要：Mesh-connected VLSI processor arrays have regular and modular structure. Such structure is readily employed for high-speed implementation of most signal and image processing algorithms. With the advanced techniques in very large scale integration (VLSI) technologies, large number of processing elements (PEs) can be built on a single chip. As the density of VLSI arrays increases, the probability of occurrence of hard faults in the arrays during fabrication also increases. On the other hand, in the runtime systems some PEs are temporally unavailable for the current application due to their `soft faults" caused by overheating, overload or being employed by other applications. Thus, it is almost impossible to guarantee all the PEs in the system to be fault-free throughout its working lifetime.  Therefore, the large VLSI arrays must provide fault tolerance in order to achieve operability and dependability of the systems on use. This talk focuses on the efficient reconfiguration algorithms for the degradable VLSI arrays with faults. The latest work on this topic will be presented.

报告人简介：武教授为天津市特聘教授，博士生导师，任职于天津工业大学我院院长。中国计算机学会理论计算机科学专委会委员、高性能计算专业委员会委员。1983年毕业于兰州大学计算数学专业并留校工作。1997年至2000年在中国科技大学国家高性能计算中心（合肥）攻读计算机软件与理论专业, 师从于陈国良院士、获博士学位；2000年至2002年在新加坡南洋理工大学我院做博士后， 并留校在高性能嵌入式系统中心任研究员至2009年。长期从事高性能系统设计、容错可重构计算、并行分布计算、最优化问题求解等领域的算法研究， 并取得一系列高质量的研究成果, 保持多年的国际领先地位。先后在本专业国内外重要期刊(IEEE Transactions on Computers、on Parallel and Distributed Systems、on VLSI Systems、Elsevier and Springer Journal)以及重要国际学术会议上发表学术论文150余篇。